搜索资源列表
amba3core.rar
- amba3 sva 完全验证的代码，有verilog的和systemverilog的,amba3 sva fully validate the code, and the Verilog and SystemVerilog
ahb2ahb.rar
- AMBA总线AHB TO AHB bridge,AMBA bus AHB TO AHB bridge
AHBtoAPB.rar
- amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc,amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
APB
- It s the verilog source code for AMBA APB 2.0 Slave
handshake
- AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
System_Design_and_Implementation_of_AXI_Bus
- AMBA AXI资料，台湾硕士论文，网上收集-AMBA AXI, Taiwanese master' s thesis, on-line collection of
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
ahb_master1
- this is a code of AMBA AHB master protocol in verilog
New
- amba ahb master decoder
au
- 基于APB总线的uart控制器，包括源码和vcs脚本-UART controller based on AMBA APB
AHB
- 用VHDL编写的AMBA总线的AHB代码-Written with the VHDL code for AMBA bus AHB
AMBA
- 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
AMBAaxi
- amba with arm processor descr iption and use
arm9verilog
- AMBA AHB verilog Source code
Axi_mux
- The elements come from the necessity of creating generic modules, in the verification phase, for this widely used protocol. These primitives are presented as a not compiled library written in SystemC where interfaces are the core of the lib
AMBA
- AMBA总线的verilog实现，AMBA是ARM limited 公司推出的一种为嵌入式系统所设计的总线协议。-AMBA bus Verilog, AMBA bus protocol is the the of ARM limited company launched a embedded system design.
verilog-master-files
- Verilog master files of AMBA axi interface
AMBA
- AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型-AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave
apb.v
- AMBA总线apb总线的verilog代码以及相关的中断控制。(AMBA bus apb bus verilog code and associated interrupt control.)